Middle of line structures
US10580875B2 · kind B2 · utility
1Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 17, 2018 |
| Grant date | Mar 3, 2020 |
| Priority date | — |
| Expiry date | Jan 17, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/8316
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure generally relates to semiconductor structures and, more particularly, to middle of line structures and methods of manufacture. The structure includes: a plurality of gate structures comprising source and/or drain metallization features; spacers on sidewalls of the gate structures and composed of a first material and a second material; and contacts in electrical contact with the source and/or drain metallization features, and separated from the gate structures by the spacers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.