Guowei Xu
35Patents
4h-index
67Co-inventors
62Inventor score
Filing activity: Jun 27, 2011 → Aug 27, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10410933B2 | Replacement metal gate patterning for nanosheet devices | Electricity | 14 | Active |
| USD965577S1 | Mobile phone case | General | 11 | Active |
| US10373877B1 | Methods of forming source/drain contact structures on integrated circuit products | Electricity | 8 | Active |
| US10153209B1 | Insulating gate separation structure and methods of making same | Electricity | 4 | Active |
| US10734233B2 | FinFET with high-k spacer and self-aligned contact capping layer | Electricity | 3 | Active |
| US10692987B2 | IC structure with air gap adjacent to gate structure and methods of forming same | Electricity | 2 | Active |
| US10879180B2 | FinFET with etch-selective spacer and self-aligned contact capping layer | Electricity | 2 | Active |
| US9722110B2 | Plasmonic graphene and method of making the same | Emerging Cross-Sectional Technologies | 1 | Active |
| US10629739B2 | Methods of forming spacers adjacent gate structures of a transistor device | Electricity | 1 | Active |
| US10534924B2 | Software handling device, server system and methods thereof | Physics | 1 | Active |
| US10818659B2 | FinFET having upper spacers adjacent gate and source/drain contacts | Electricity | 1 | Active |
| US10522538B1 | Using source/drain contact cap during gate cut | Electricity | 1 | Active |
| US10580875B2 | Middle of line structures | Electricity | 1 | Active |
| US10872979B2 | Spacer structures for a transistor device | Electricity | 1 | Active |
| US11655641B2 | Construction building equipment and construction method thereof | Fixed Constructions | 1 | Active |
| US10784143B2 | Trench isolation preservation during transistor fabrication | Electricity | 0 | Active |
| US10923469B2 | Vertical resistor adjacent inactive gate over trench isolation | Electricity | 0 | Active |
| US10636893B2 | Replacement metal gate with reduced shorting and uniform chamfering | Electricity | 0 | Active |
| US10811409B2 | Method of manufacturing FinFET with reduced parasitic capacitance and FinFET structure formed thereby | Electricity | 0 | Active |
| US10522644B1 | Different upper and lower spacers for contact | Electricity | 0 | Active |
| US8539042B2 | Method for establishing a network platform for renting the electronic publications | Electricity | 0 | Active |
| US11321098B2 | Multi-operating system device, notification device and methods thereof | Electricity | 0 | Active |
| US10978566B2 | Middle of line structures | Electricity | 0 | Active |
| US12271225B2 | Mobile terminal protective shell | Physics | 0 | Active |
| US10797049B2 | FinFET structure with dielectric bar containing gate to reduce effective capacitance, and method of forming same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.