SiC trench transistor device and methods of manufacturing thereof

US10586845B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Thomas Aichinger · Faak am See, AT
• Wolfgang Bergner · Waldbüttelbrunn, DE
• Paul Ellinghaus · Unterhaching, DE
• Rudolf Elpelt · Erlangen, DE
• Romain Esteve · Munich, DE
• Florian Grasse · Hohenthurn, AT
• Caspar Leendertz · Munich, DE
• Shiqin Niu · Freising, DE
• Dethard Peters · Edenkoben, DE
• Ralf Siemieniec · Villach, AT
• Bernd Zippelius · Erlangen, DE

Key dates

• Filing date: Nov 16, 2018
• Grant date: Mar 10, 2020
• Expiry date: Nov 16, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/405
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

According to an embodiment of a semiconductor device, the device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. Rows of source regions of a first conductivity type are formed in the SiC substrate and extend lengthwise in parallel in a second direction which is transverse to the first direction. Rows of body regions of a second conductivity type opposite the first conductivity type are formed in the SiC substrate below the rows of source regions. Rows of body contact regions of the second conductivity type are formed in the SiC substrate. The rows of body contact regions extend lengthwise in parallel in the second direction. First shielding regions of the second conductivity type are formed deeper in the SiC substrate than the rows of body regions.