Resistive random access memory
US10593877B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 2018 |
| Grant date | Mar 17, 2020 |
| Priority date | — |
| Expiry date | Apr 10, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8416
Abstract
A resistive random access memory is provided. The resistive random access memory includes a bottom electrode over a substrate, a top electrode, a resistance-switching layer, an oxygen exchange layer, and a sidewall protective layer. The top electrode is disposed over the bottom electrode. The resistance-switching layer is disposed between the bottom electrode and the top electrode. The oxygen exchange layer is disposed between the resistance-switching layer and the top electrode. The sidewall protective layer containing metal or semiconductor is disposed at sidewalls of the resistance-switching layer, and the sidewalls of the resistance-switching layer is doped with the metal or semiconductor from the sidewall protective layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.