Gate all around device and method of formation using angled ions
US10607847B1 · kind B1 · utility
2Cited by
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15Claims
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Key dates
| Filing date | Dec 3, 2018 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Dec 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/43
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of forming a three-dimensional transistor device. The method may include providing a fin array on a substrate, the fin array comprising a plurality of fin structures, formed from a monocrystalline semiconductor, and disposed subjacent to a hard mask layer. The method may include directing angled ions at the fin array, wherein the angled ions form a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate. The angled ions may etch the plurality of fin structures to form a stack of isolated nanowires, within a given fin structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.