Integrated two-terminal device with logic device for embedded application
US10608046B2 · kind B2 · utility
2Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 5, 2019 |
| Grant date | Mar 31, 2020 |
| Priority date | — |
| Expiry date | Jul 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/10
Abstract
Devices and methods of forming a device. A two-terminal device element includes a device stack coupled between first and second terminals. The first terminal contacts a metal line in an underlying interconnect level, and the second terminal is formed over the device layer. An encapsulation liner covers exposed side surfaces of the device stack of the two-terminal device element. A dual damascene interconnect is coupled to the two-terminal device element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.