Amelioration of global wafer distortion based on determination of localized distortions of a semiconductor wafer
US10622233B2 · kind B2 · utility
8Cited by
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20Claims
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Key dates
| Filing date | Aug 3, 2018 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Oct 2, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein is a technology related to the amelioration (e.g., correction) of global wafer distortion based on a determination of localized distortions of a semiconductor wafer. Herein, a distortion is either an out-of-plane distortion (OPD) or in-plane distortion (IPD). The reference plane for this distortion is based on the plane shared by the surface of a presumptively flat semiconductor wafer. This Abstract is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.