Three-dimensional memory device including contact via structures that extend through word lines and method of making the same
US10622369B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2018 |
| Grant date | Apr 14, 2020 |
| Priority date | — |
| Expiry date | Apr 1, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76831
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional memory device includes semiconductor devices located on a semiconductor substrate, lower interconnect level dielectric layers embedding lower interconnect structures, an alternating stack of insulating layers and electrically conductive layers overlying the lower interconnect level dielectric layers and including stepped surfaces, memory stack structures vertically extending through the alternating stack, and contact via structures extending downward from the stepped surfaces through underlying portions of the alternating stack to the lower interconnect structures. Each of the contact via structures laterally contacts an electrically conductive layer located at the stepped surfaces, and provides electrical interconnection to an underlying semiconductor device. A top portion of each contact via structures contacts an electrically conductive layer, and is electrically isolated from other underlying electrically conductive layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.