Passive array test structure for cross-point memory characterization
US10643735B1 · kind B1 · utility
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Key dates
| Filing date | Jul 11, 2018 |
| Grant date | May 5, 2020 |
| Priority date | — |
| Expiry date | Jul 11, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/77
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for testing two-terminal memory elements organized as a cross-point memory array. The apparatus allows functional testing of two-terminal memory elements organized as a cross-point memory array, and built in a short flow manufacturing process. The proposed apparatus substantially eliminates the use of any type of additional active or passive switches, selectors, or decoders. A large number of memory elements of various memory types including planar (two dimensional) or three dimensional memory structures can be tested without the need of manufacturing selectors or running the full flow process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.