Integrated circuit substrate and method for manufacturing the same
US10672716B2 · kind B2 · utility
0Cited by
12References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 9, 2018 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | Jul 9, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54473
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit substrate and a method for manufacturing the same are disclosed. In an embodiment a method includes providing a wafer having a plurality of active areas, each active area being provided in a separate die area and for each active area, providing a code pattern outside the active area, the code pattern being associated with the die area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.