Manufacturing method of semiconductor memory device
US10672864B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 11, 2019 |
| Grant date | Jun 2, 2020 |
| Priority date | — |
| Expiry date | Mar 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/714
Abstract
A semiconductor memory device includes a semiconductor substrate, a first support layer, a first electrode, a capacitor dielectric layer, and a second electrode. The first support layer is disposed on the semiconductor substrate. The first electrode is disposed on the semiconductor substrate and penetrates the first support layer. The capacitor dielectric layer is disposed on the first electrode. The second electrode is disposed on the semiconductor substrate, and at least a part of the capacitor dielectric layer is disposed between the first electrode and the second electrode. The first support layer includes a carbon doped nitride layer, and a carbon concentration of a bottom portion of the first support layer is higher than a carbon concentration of a top portion of the first support layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.