Memory cell comprising non-self-aligned horizontal and vertical control gates
US10686046B2 · kind B2 · utility
0Cited by
18References
20Claims
0Family size
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Key dates
| Filing date | Jul 16, 2019 |
| Grant date | Jun 16, 2020 |
| Priority date | — |
| Expiry date | Jul 16, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/035
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a memory cell comprising a vertical selection gate extending in a trench made in a substrate, a floating gate extending above the substrate, and a horizontal control gate extending above the floating gate, wherein the floating gate also extends above a portion of the vertical selection gate over a non-zero overlap distance. Application mainly to the production of a split gate memory cell programmable by hot-electron injection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.