Multi-chip packaging

US10700051B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Robert L. Sankman · Phoenix, US
• Sairam Agraharam · Chandler, US
• Shengquan Ou · Chandler, US
• Thomas J. De Bonis · Tempe, US
• Todd Spencer · Chandler, US
• Yang Sun · Chandler, US
• Guotao Wang · Chandler, US

Key dates

• Filing date: Jun 4, 2018
• Grant date: Jun 30, 2020
• Expiry date: Jun 4, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/18162
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An electronic device may include a first die that may include a first set of die contacts. The electronic device may include a second die that may include a second set of die contacts. The electronic device may include a bridge interconnect that may include a first set of bridge contacts and may include a second set of bridge contacts. The first set of bridge contacts may be directly coupled to the first set of die contacts (e.g., with an interconnecting material, such as solder). The second set of bridge contacts may be directly coupled to the second set of die contacts (e.g., with solder). The bridge interconnect may help facilitate electrical communication between the first die and the second die.