Methods for depositing dielectric barrier layers and aluminum containing etch stop layers

US10707122B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Sree Rangasai V. Kesapragada · Union City, US
• Kevin Moraes · Fremont, US
• Srinivas Guggilla · San Jose, US
• He Ren · San Jose, US
• Mehul Naik · San Jose, US
• David Thompson · San Jose, US
• Weifeng YE · San Jose, US
• Yana Cheng · San Jose, US
• Yong Cao · Goleta, US
• Xianmin Tang · San Jose, US
• Paul F. Ma · Santa Clara, US
• Deenesh Padhi · Sunnyvale, US

Key dates

• Filing date: Sep 24, 2018
• Grant date: Jul 7, 2020
• Expiry date: Jan 2, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76834
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In some embodiments, a method of forming an interconnect structure includes selectively depositing a barrier layer atop a substrate having one or more exposed metal surfaces and one or more exposed dielectric surfaces, wherein a thickness of the barrier layer atop the one or more exposed metal surfaces is greater than the thickness of the barrier layer atop the one or more exposed dielectric surfaces. In some embodiments, a method of forming an interconnect structure includes depositing an etch stop layer comprising aluminum atop a substrate via a physical vapor deposition process; and depositing a barrier layer atop the etch stop layer via a chemical vapor deposition process, wherein the substrate is transferred from a physical vapor deposition chamber after depositing the etch stop layer to a chemical vapor deposition chamber without exposing the substrate to atmosphere.