Semiconductor device with interconnect to source/drain

US10707330B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Hans-Juergen Thees · Dresden, DE
• Peter Baars · Dresden, DE
• Elliot John Smith · Dresden, DE

Key dates

• Filing date: Feb 15, 2018
• Grant date: Jul 7, 2020
• Expiry date: Apr 5, 2038

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method of manufacturing a semiconductor device is provided including providing an SOI substrate comprising a semiconductor bulk substrate, a buried insulation layer and a semiconductor layer, forming a shallow trench isolation in the SOI substrate, forming a FET in and over the SOI substrate, and forming a contact to a source or drain region of the FET that is positioned adjacent to the source or drain region, wherein forming the shallow trench isolation includes forming a trench in the SOI substrate, filling a lower portion of the trench with a first dielectric layer, forming a buffer layer over the first dielectric material layer, the buffer layer having a material different from a material of the first dielectric layer, and forming a second dielectric layer over the buffer layer and of a material different from the material of the buffer layer.