Semiconductor device and semiconductor wafer including a porous layer and method of manufacturing
US10714377B2 · kind B2 · utility
2Cited by
1References
39Claims
0Family size
Assignee
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Key dates
| Filing date | Sep 5, 2018 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Sep 5, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a semiconductor device includes forming an auxiliary mask including a plurality of mask openings on a main surface of a crystalline semiconductor substrate. A porous structure is formed in the semiconductor substrate. The porous structure includes a porous layer at a distance to the main surface and porous columns that extend from the porous layer into direction of the main surface and that are laterally separated from each other by a non-porous portion. A non-porous device layer is formed on the non-porous portion and on the porous columns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.