Structure and method using metal spacer for insertion of variable wide line implantation in SADP/SAQP integration
US10714389B2 · kind B2 · utility
0Cited by
8References
20Claims
0Family size
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Key dates
| Filing date | Jan 4, 2019 |
| Grant date | Jul 14, 2020 |
| Priority date | — |
| Expiry date | Jan 4, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5283
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and methods to fabricate the devices are provided. For example, a semiconductor device includes a back-end-of-line (BEOL) structure formed on a semiconductor substrate. The BEOL structure further includes at least one metallization layer comprising a pattern of elongated parallel metal lines. The pattern of elongated metal lines comprises a plurality of metal lines having a minimum width and at least one wider metal line having a width which is greater than the minimum width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.