Memory device and method for varying program state separation based upon frequency of use
US10720217B1 · kind B1 · utility
11Cited by
24References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 11, 2019 |
| Grant date | Jul 21, 2020 |
| Priority date | — |
| Expiry date | Apr 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a plurality of memory cells and a controller. The controller is configured to program each of the memory cells to one of a plurality of program states, and to read the memory cells using a read operation of applied voltages to the memory cells. During the read operation, separations between adjacent ones of the program states vary based on frequencies of use of the program states in the plurality of memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.