Accelerated wafer testing using non-destructive and localized stress

US10739397B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Benjamin D. Briggs · Cohoes, US
• Lawrence A. Clevenger · Saratoga Springs, US
• Nicholas Anthony Lanzillo · Wynantskill, US
• Michael Rizzolo · Delmar, US
• Theodorus E. Standaert · Clifton Park, US
• James H. Stathis · Poughquag, US

Key dates

• Filing date: May 10, 2017
• Grant date: Aug 11, 2020
• Expiry date: May 10, 2037

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/2875
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

Embodiments of the invention are directed to a semiconductor wafer test system. A non-limiting example of the test system includes a controller, a sensing system communicatively coupled to the controller, and a stress source communicatively coupled to the controller. The controller is configured to control the stress source to deliver an applied stress to a targeted stress area of a semiconductor wafer. The sensing system is configured to detect the applied stress and provide data of the applied stress to the controller. The controller is further configured to control the stress source based at least in part on the data of the applied stress.