Temperature and leakage compensation for memory cells in an analog neural memory system used in a deep learning neural network
US10755783B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 7, 2018 |
| Grant date | Aug 25, 2020 |
| Priority date | — |
| Expiry date | Nov 23, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Numerous embodiments are disclosed for providing temperature compensation and leakage compensation for an analog neuromorphic memory system used in a deep learning neural network. The embodiments for providing temperature compensation implement discreet or continuous adaptive slope compensation and renormalization for devices, reference memory cells, or selected memory cells in the memory system. The embodiments for providing leakage compensation within a memory cell in the memory system implement adaptive erase gate coupling or the application of a negative bias on a control gate terminal, a negative bias on a word line terminal, or a bias on a source line terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.