Semiconductor structure
US10763212B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2019 |
| Grant date | Sep 1, 2020 |
| Priority date | — |
| Expiry date | Apr 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a substrate including a surface, a first doped region and a second doped region, wherein the first doped region and the second doped region are disposed under the surface; a gate structure disposed between the first doped region and the second doped region; a capacitor disposed over and electrically connected to the first doped region; and a bit line disposed over and electrically connected to the second doped region, wherein the bit line includes a conductive portion and an insulating portion surrounding the conductive portion, and the insulating portion includes ferroelectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.