Patent · US Active

Stair-stacked dice device in a system in package, and methods of making same

US10770434B2 · kind B2 · utility

2Cited by
0References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 30, 2016
Grant dateSep 8, 2020
Priority date
Expiry dateSep 30, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/181
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A system in package includes a stair-stacked memory module that is stacked vertically with respect to a processor die. A spacer is used adjacent to the processor die to create a bridge for the stair-stacked memory module. Each memory die in the stair-stacked memory module includes a vertical bond wire that emerges from a matrix for connection. The matrix encloses the stair-stacked memory module and at least a portion of the processor die.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.