Adjustment of read and write voltages using a space between threshold voltage distributions
US10790036B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2019 |
| Grant date | Sep 29, 2020 |
| Priority date | — |
| Expiry date | Aug 28, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A current demarcation voltage is determined, where the current demarcation voltage is to be applied to a memory cell for reading a state of the memory cell. A plurality of test demarcation voltages is determined based on the current demarcation voltage and a space between a first threshold voltage distribution corresponding to a first state of the memory cell and a second threshold voltage distribution corresponding to a second state of the memory cell. For each test demarcation voltage, an error rate of reading the state of the memory cell based on a respective test demarcation voltage is determined. A test demarcation voltage having the lowest error rate from the plurality of test demarcation voltages is determined. The current demarcation voltage is set to correspond to the test demarcation voltage having the lowest error rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.