Wafer transport assembly with integrated buffers
US10790174B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2018 |
| Grant date | Sep 29, 2020 |
| Priority date | — |
| Expiry date | Apr 12, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67769
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer transport assembly includes a first wafer transport module and a second wafer transport module. A buffer module, arranged between the first wafer transport module and the second wafer transport module, includes a first buffer stack and a second buffer stack. Outer sides of the first wafer transport module are coupled to first and second process modules, respectively, and outer sides of the second wafer transport module are coupled to third and fourth process modules, respectively. The first wafer transport module, the second wafer transport module, and the buffer module define a continuous wafer transport volume providing a controlled environment within the wafer transport assembly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.