Method of making embedded memory device with silicon-on-insulator substrate
US10790292B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2018 |
| Grant date | Sep 29, 2020 |
| Priority date | — |
| Expiry date | Sep 15, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device where memory cells and some logic devices are formed on bulk silicon while other logic devices are formed on a thin silicon layer over insulation over the bulk silicon of the same substrate. The memory cell stacks, select gate poly, and source regions for the memory devices are formed in the memory area before the logic devices are formed in the logic areas. The various oxide, nitride and poly layers used to form the gate stacks in the memory area are formed in the logic areas as well. Only after the memory cell stacks and select gate poly are formed, and the memory area protected by one or more protective layers, are the oxide, nitride and poly layers used to form the memory cell stacks removed from the logic areas, and the logic devices are then formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.