Method for forming channel hole in three-dimensional memory device using nonconformal sacrificial layer
US10790297B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 2018 |
| Grant date | Sep 29, 2020 |
| Priority date | — |
| Expiry date | Jan 22, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of methods for forming channel holes in 3D memory devices using a nonconformal sacrificial layer are disclosed. In an example, a dielectric stack including interleaved first dielectric layers and second dielectric layers is formed on a substrate. An opening extending vertically through the dielectric stack is formed. A nonconformal sacrificial layer is formed along a sidewall of the opening, such that a variation of a diameter of the opening decreases. The nonconformal sacrificial layer and part of the dielectric stack abutting the nonconformal sacrificial layer are removed. A channel structure is formed in the opening after removing the nonconformal sacrificial layer and part of the dielectric stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.