Hongbin Zhu
91Patents
7h-index
96Co-inventors
75Inventor score
Filing activity: Feb 25, 1999 → Nov 28, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8173507B2 | Methods of forming integrated circuitry comprising charge storage transistors | Electricity | 63 | Active |
| US10090318B2 | Vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure and method of forming a vertical string of memory cells individually comprising a programmable charge storage transistor comprising a control gate and a charge storage structure | Electricity | 21 | Active |
| US9595531B2 | Aluminum oxide landing layer for conductive channels for a three dimensional circuit device | Electricity | 11 | Active |
| US9431410B2 | Methods and apparatuses having memory cells including a monolithic semiconductor channel | Electricity | 11 | Active |
| US8030218B2 | Method for selectively modifying spacing between pitch multiplied structures | Electricity | 9 | Active |
| US9048194B2 | Method for selectively modifying spacing between pitch multiplied structures | Electricity | 8 | Active |
| US9659949B2 | Integrated structures | Electricity | 8 | Active |
| US10242995B2 | Drain select gate formation methods and apparatus | Electricity | 7 | Active |
| US10566336B1 | Three-dimensional memory devices having through array contacts and methods for forming the same | Electricity | 6 | Active |
| US9741734B2 | Memory devices and systems having reduced bit line to drain select gate shorting and associated methods | Electricity | 5 | Active |
| US11205659B2 | Interconnect structures of three-dimensional memory devices | Physics | 5 | Active |
| US10707121B2 | Solid state memory device, and manufacturing method thereof | Electricity | 5 | Active |
| US10134758B2 | Memory devices and systems having reduced bit line to drain select gate shorting and associated methods | Electricity | 4 | Active |
| US10038002B2 | Semiconductor devices and methods of fabrication | Electricity | 3 | Active |
| US9613973B2 | Memory having a continuous channel | Electricity | 3 | Active |
| US6153061A | Method of synthesizing cubic boron nitride films | Chemistry; Metallurgy | 3 | Expired |
| US8507384B2 | Method for selectively modifying spacing between pitch multiplied structures | Electricity | 3 | Active |
| US10090317B2 | Methods and apparatuses having memory cells including a monolithic semiconductor channel | Electricity | 3 | Active |
| USD1009664S1 | Body fat scale | General | 2 | Active |
| US10504859B2 | Electronic component guard ring | Electricity | 2 | Active |
| US10608004B2 | Semiconductor devices and methods of fabrication | Electricity | 2 | Active |
| US7476588B2 | Methods of forming NAND cell units with string gates of various widths | Electricity | 2 | Active |
| US11043505B2 | Three-dimensional memory device having multi-deck structure and methods for forming the same | Electricity | 2 | Active |
| US7898019B2 | Semiconductor constructions having multiple patterned masking layers over NAND gate stacks | Electricity | 2 | Active |
| US10269819B2 | Integrated structures and methods of forming vertically-stacked memory cells | Electricity | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.