Bonded assembly containing memory die bonded to integrated peripheral and system die and methods for making the same
US10811058B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2019 |
| Grant date | Oct 20, 2020 |
| Priority date | — |
| Expiry date | Apr 20, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A bonded assembly includes a memory die bonded to a support die. The memory die contains at least one three-dimensional array of memory elements, memory-die dielectric material layers, and memory-die bonding pads. The support die contains at least one peripheral circuitry including complementary metal-oxide-semiconductor (CMOS) devices and configured to generate control signals for, and receive sense signals from, the at least one three-dimensional array of memory elements and a functional module and configured to provide a functionality that is independent of operation of the at least one three-dimensional array of memory elements. The functional module may include an error correction code (ECC) module, a memory module configured to interface with an external processor module located outside of the memory die, a microprocessor unit module, a wireless communication module, and/or a system level controller module.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.