Yan Li
14Patents
5h-index
29Co-inventors
58Inventor score
Filing activity: Jun 7, 2016 → Sep 2, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10249640B2 | Within-array through-memory-level via structures and method of making thereof | Electricity | 34 | Active |
| US10256248B2 | Through-memory-level via structures between staircase regions in a three-dimensional memory device and method of making thereof | Electricity | 29 | Active |
| US11133325B2 | Memory cell structure of a three-dimensional memory device | Electricity | 11 | Active |
| US10811058B2 | Bonded assembly containing memory die bonded to integrated peripheral and system die and methods for making the same | Electricity | 10 | Active |
| US10707228B2 | Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same | Electricity | 7 | Active |
| US10644015B2 | Memory cell structure of a three-dimensional memory device | Electricity | 3 | Active |
| US10121522B1 | Sense circuit with two sense nodes for cascade sensing | Physics | 3 | Active |
| US10120816B2 | Bad column management with data shuffle in pipeline | Physics | 2 | Active |
| US10847528B2 | Memory cell structure of a three-dimensional memory device | Electricity | 1 | Active |
| US12063780B2 | Memory cell structure of a three-dimensional memory device | Electricity | 0 | Active |
| US11114439B2 | Multi-division 3D NAND memory device | Electricity | 0 | Active |
| US10790285B2 | Multi-division 3D NAND memory device | Electricity | 0 | Active |
| US10971199B2 | Microcontroller for non-volatile memory with combinational logic | Physics | 0 | Active |
| US10825826B2 | Three-dimensional memory device having bonding structures connected to bit lines and methods of making the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.