Marks for locating patterns in semiconductor fabrication
US10811363B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2019 |
| Grant date | Oct 20, 2020 |
| Priority date | — |
| Expiry date | Mar 30, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54493
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of semiconductor fabrication methods are disclosed. In an example, a method for forming a mark for locating patterns in semiconductor fabrication is disclosed. A wafer is divided into a plurality of shots. Each of the plurality of shots includes a semiconductor chip die. Four quarters of a locking corner mark are subsequently patterned, respectively, at four corners of four adjacent shots of the plurality of shots. Each quarter of the locking corner mark is symmetric to adjacent quarters of the locking corner mark and is separated from the adjacent quarters of the locking corner mark by a nominally same distance. The locking corner mark is set as an origin for locating patterns in at least one of the four adjacent shots in semiconductor fabrication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.