Nanosheet field-effect transistors formed with sacrificial spacers
US10818792B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2018 |
| Grant date | Oct 27, 2020 |
| Priority date | — |
| Expiry date | Sep 8, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
Structures for a field-effect transistor and methods of forming structures for a field-effect transistor. A layer stack includes nanosheet channel layers arranged to alternate with sacrificial layers. First and second gate structures are formed that extend across the layer stack and that are separated by a first gap. First and second sidewall spacers are formed over the layer stack and within the first gap respectively adjacent to the first and second gate structures, and the layer stack is subsequently etched to form first and second body features that are separated by a second gap. The sacrificial layers are recessed relative to the nanosheet channel layers to define indents in the first and second body features, and the first and second sidewall spacers are subsequently removed. After removing the first and second sidewall spacers, a conformal layer is deposited in the second gap that fills the indents to define inner spacers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.