Three-dimensional memory device and manufacturing method thereof
US10854628B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2019 |
| Grant date | Dec 1, 2020 |
| Priority date | — |
| Expiry date | Apr 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A three-dimensional (3D) memory device and a manufacturing method thereof are provided. The method includes the following steps. An alternating dielectric stack is formed on a substrate. A vertical structure is formed penetrating the alternating dielectric stack in a vertical direction. A bottom dielectric layer of the alternating dielectric stack is removed. An epitaxial layer is formed between the substrate and the alternating dielectric stack after removing the bottom dielectric layer. An insulating layer is formed on the epitaxial layer. The insulating layer is located between the epitaxial layer and the alternating dielectric stack. The influence of the step of forming the vertical structure on the epitaxial layer may be avoided, and defects at the interface between the epitaxial layer and the bottom dielectric layer may be avoided accordingly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.