Embedded non-volatile memory device and fabrication method of the same
US10872898B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2017 |
| Grant date | Dec 22, 2020 |
| Priority date | — |
| Expiry date | Dec 20, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
Systems and methods of forming such include method, forming a memory gate (MG) stack in a first region, forming a sacrificial polysilicon gate on a high-k dielectric in a second region, wherein the first and second regions are disposed in a single substrate. Then a select gate (SG) may be formed adjacent to the MG stack in the first region of the semiconductor substrate. The sacrificial polysilicon gate may be replaced with a metal gate to form a logic field effect transistor (FET) in the second region. The surfaces of the substrate in the first region and the second region are substantially co-planar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.