Patent · US Active

Integrated circuit control latch protection

US10890622B2 · kind B2 · utility

0Cited by

9References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Stefan Payer · Stuttgart, DE
Michael Klein · Schenefeld, DE
Nicol Hofmann · Stuttgart, DE
Cedric Lichtenau · Stuttgart, DE

Key dates

Filing date	Apr 29, 2019
Grant date	Jan 12, 2021
Priority date	—
Expiry date	Apr 29, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/327
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Aspects include parsing, by a computer system, a design file of an integrated circuit including a plurality of stages to extract a plurality of inputs and outputs of a plurality of latches. The computer system can sort the latches based on latch locations in the stages and build a plurality of ordered vectors of signals before and after the latches based on the sorting. The computer system can build a plurality of parity vectors for each of the ordered vectors of signals before and after the latches, build a latch bank for each of the parity vectors before the latches, and build a parity vector comparison to detect a parity failure based on comparing the parity vectors after the latches with an output of the latch bank.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.