SiC device and methods of manufacturing thereof

US10896952B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Thomas Aichinger · Faak am See, AT
• Wolfgang Bergner · Waldbüttelbrunn, DE
• Paul Ellinghaus · Unterhaching, DE
• Rudolf Elpelt · Erlangen, DE
• Romain Esteve · Munich, DE
• Florian Grasse · Hohenthurn, AT
• Caspar Leendertz · Munich, DE
• Shiqin Niu · Freising, DE
• Dethard Peters · Edenkoben, DE
• Ralf Siemieniec · Villach, AT
• Bernd Zippelius · Erlangen, DE

Key dates

• Filing date: Feb 21, 2020
• Grant date: Jan 19, 2021
• Expiry date: Feb 21, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/405
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device includes gate trenches formed in a SiC substrate and extending lengthwise in parallel in a first direction. A trench interval which defines a space between adjacent gate trenches extends in a second direction perpendicular to the first direction. Source regions of a first conductivity type formed in the SiC substrate occupy a first part of the space between adjacent gate trenches. Body regions of a second conductivity type opposite the first conductivity type formed in the SiC substrate and below the source regions occupy a second part of the space between adjacent gate trenches. Body contact regions of the second conductivity type formed in the SiC substrate occupy a third part of the space between adjacent gate trenches. Shielding regions of the second conductivity type formed deeper in the SiC substrate than the body regions adjoin a bottom of at least some of the gate trenches.