Integration of stress decoupling and particle filter on a single wafer or in combination with a waferlevel package
US10899604B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2019 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Apr 18, 2039 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81C2203/0109
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate having a first surface and a second surface arranged opposite to the first surface; a stress-sensitive sensor disposed at the first surface of the substrate, where the stress-sensitive sensor is sensitive to mechanical stress; a stress-decoupling trench that has a vertical extension that extends from the first surface into the substrate, where the stress-decoupling trench vertically extends partially into the substrate towards the second surface although not completely to the second surface; and a plurality of particle filter trenches that vertically extend from the second surface into the substrate, wherein each of the plurality of particle filter trenches have a longitudinal extension that extends orthogonal to the vertical extension of the stress-decoupling trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.