Hybrid bonding contact structure of three-dimensional memory device
US10923491B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 17, 2020 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Mar 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/80896
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of through array contact structures of a 3D memory device and fabricating method thereof are disclosed. The memory device includes an alternating layer stack disposed on a first substrate. The alternating layer stack includes a first region including an alternating dielectric stack, and a second region including an alternating conductor/dielectric stack. The memory device further includes a barrier structure extending vertically through the alternating layer stack to laterally separate the first region from the second region, multiple through array contacts in the first region, each through array contact extending vertically through the alternating dielectric stack, an array interconnection layer in contact with the through array contacts, a peripheral circuit formed on a second substrate. and a peripheral interconnection layer on the peripheral circuit. The array interconnection layer is bonded on the peripheral interconnection layer, such that the peripheral circuit is electrically connected with at least one through array contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.