Internal via with improved contact for upper semi-conductor layer of a 3D circuit

US10930562B2 · kind B2 · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Claire Fenouillet-Beranger · Grenoble, FR
• Fabrice Nemouchi · Moirans, FR
• Maud Vinet · Voiron, FR

Key dates

• Filing date: May 24, 2019
• Grant date: Feb 23, 2021
• Expiry date: May 24, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D88/01
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A connection structure for microelectronic device with superposed semi-conductor layers including a conductor via that connects a lower face of an upper semi-conductor layer and an underlying conducting zone, the connection structure further including a silicide zone in contact with a lower face or with an inner face of the layer of the upper semi-conductor layer.