Non-volatile memory device and control method
US10957408B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2019 |
| Grant date | Mar 23, 2021 |
| Priority date | — |
| Expiry date | Dec 18, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device is disclosed. The non-volatile memory device includes a memory array, a plurality of word lines, a plurality of dummy word lines, a first control circuit and a second control circuit. The plurality of word lines are connected to a plurality of top memory cells and bottom memory cells of a memory string of the memory array. The plurality of dummy word lines are connected to a plurality of dummy memory cells connected between the plurality of top memory cells and bottom memory cells. The first control circuit is configured to apply a bit line pre-pulse signal to the bit line during a pre-charge period. The second control circuit is configured to apply a selected word line signal to a selected word line, apply an unselected word line signal to unselected word lines and apply a negative pre-pulse signal to the plurality of dummy word lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.