Connection structure of semiconductor device and manufacturing method thereof
US10978391B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 12, 2017 |
| Grant date | Apr 13, 2021 |
| Priority date | — |
| Expiry date | Oct 12, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5329
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A connection structure of a semiconductor device is provided in the present invention. The connection structure includes an interlayer dielectric, a top metal structure, and a passivation layer. The interlayer dielectric is disposed on a substrate. The top metal structure is disposed on the interlayer dielectric. The top metal structure includes a bottom portion and a top portion disposed on the bottom portion. The bottom portion includes a first sidewall, and the top portion includes a second sidewall. A slope of the first sidewall is larger than a slope of the second sidewall. The passivation layer is conformally disposed on the second sidewall, the first sidewall, and a top surface of the interlayer dielectric.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.