Individually addressing memory devices disconnected from a data bus
US10983934B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 16, 2020 |
| Grant date | Apr 20, 2021 |
| Priority date | — |
| Expiry date | Jul 16, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1678
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory devices and methods for operating the same are provided. A memory device can include at least one command contact and at least one data contact. The memory device can be configured to detect a condition in which the at least one command contact is connected to a controller and the at least one data contact is disconnected from the controller, and to enter, based at least in part on detecting the condition, a first operating mode with a lower nominal power rating than a second operating mode. Memory modules including one or more such memory devices can be provided, and memory systems including controllers and such memory modules can also be provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.