Patent · US Active

Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit

US10984500B1 · kind B1 · utility

2Cited by

1References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Ashish Sirasao · San Jose, US
Elliott Delaye · San Jose, US
Aaron Ng · San Jose, US
Ehsan Ghasemi · San Jose, US

Key dates

Filing date	Sep 19, 2019
Grant date	Apr 20, 2021
Priority date	—
Expiry date	Sep 19, 2039

Classification

Technology area (CPC G)Physics
CPC primaryG06F2212/455
WIPO fieldAudio-visual technology
WIPO sectorElectrical engineering

Abstract

An example preprocessor circuit for formatting image data into a plurality of streams of image samples includes: a plurality of memory banks configured to store the image data; multiplexer circuitry coupled to the memory banks; a first plurality of registers coupled to the multiplexer circuitry; a second plurality of registers coupled to the first plurality of registers, outputs of the second plurality of registers configured to provide the plurality of streams of image samples; bank address and control circuitry coupled to control inputs of the plurality of memory banks, the multiplexer circuitry, and the first plurality of registers; output control circuitry coupled to control inputs of the second plurality of registers; and a control state machine coupled to the bank address and control circuitry and the output control circuitry.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.