Inventor · San Jose, CA, US

Elliott Delaye

34Patents
9h-index
33Co-inventors
71Inventor score

Filing activity: Jan 14, 2005 → Dec 28, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US7176717B2 Programmable logic and routing blocks with dedicated lines Electricity 56 Expired
US7358761B1 Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes Electricity 56 Expired
US7428722B2 Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes Electricity 55 Active
US7358765B2 Dedicated logic cells employing configurable logic and dedicated logic functions Electricity 21 Expired
US10354733B1 Software-defined memory bandwidth reduction by hierarchical stream buffering for general matrix multiplication in a programmable IC Physics 17 Active
US11204747B1 Re-targetable interface for data exchange between heterogeneous systems and accelerator abstraction into software instructions Physics 12 Active
US10572225B1 Circuit arrangements and methods for performing multiply-and-accumulate operations Physics 11 Active
US10515135B1 Data format suitable for fast massively parallel general matrix multiplication in a programmable IC Physics 11 Active
US10411709B1 Circuit arrangements and methods for dividing a three-dimensional input feature map Physics 9 Active
US10460416B1 Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit Physics 8 Active
US11222256B2 Neural network processing system having multiple processors and a neural network accelerator Physics 7 Active
US10943039B1 Software-driven design optimization for fixed-point multiply-accumulate circuitry Physics 6 Active
US10678509B1 Software-driven design optimization for mapping between floating-point and fixed-point multiply accumulators Physics 5 Active
US7439768B2 Dedicated logic cells employing configurable logic and dedicated logic functions Electricity 5 Active
US7414431B2 Dedicated logic cells employing configurable logic and dedicated logic functions Electricity 5 Active
US11568218B2 Neural network processing system having host controlled kernel acclerators Physics 4 Active
US11106968B1 Circuit arrangements and methods for traversing input feature maps Physics 3 Active
US11620490B2 Multi-layer neural network processing by a neural network accelerator using host communicated merged weights and a package of per-layer instructions Physics 3 Active
US10303833B1 Parallelizing timing-based operations for circuit designs Physics 3 Active
US11036827B1 Software-defined buffer/transposer for general matrix multiplication in a programmable IC Physics 2 Active
US10984500B1 Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit Physics 2 Active
US11429848B2 Host-directed multi-layer neural network processing via per-layer work requests Electricity 2 Active
US11386644B2 Image preprocessing for generalized image processing Physics 1 Active
US9235498B1 Circuits for and methods of enabling the modification of an input data stream Physics 1 Active
US7836113B2 Dedicated logic cells employing configurable logic and dedicated logic functions Electricity 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.