Chip assembly and method of manufacturing thereof
US11004823B2 · kind B2 · utility
0Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 26, 2019 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Jul 26, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15153
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip assembly includes a carrier and a metal grid array having an opening. The metal grid array is attached to the carrier by an attachment material. The metal grid array and the carrier define a cavity which is formed by the opening and the carrier. The chip assembly further includes an electronic chip mounted in the cavity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.