Magnetoresistive random access memory
US11005030B2 · kind B2 · utility
1Cited by
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9Claims
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Key dates
| Filing date | Mar 10, 2019 |
| Grant date | May 11, 2021 |
| Priority date | — |
| Expiry date | Jul 17, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
Abstract
A semiconductor device preferably includes a metal-oxide semiconductor (MOS) transistor disposed on a substrate, an interlayer dielectric (ILD) layer disposed on the MOS transistor, and a magnetic tunneling junction (MTJ) disposed on the ILD layer. Preferably, a top surface of the MTJ includes a reverse V-shape while the top surface of the MTJ is also electrically connected to a source/drain region of the MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.