Tracking stores and loads by bypassing load store units
US11048506B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2019 |
| Grant date | Jun 29, 2021 |
| Priority date | — |
| Expiry date | Dec 23, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3838
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for tracking stores and loads to reduce load latency when forming the same memory address by bypassing a load store unit within an execution unit is disclosed. Store-load pairs which have a strong history of store-to-load forwarding are identified. Once identified, the load is memory renamed to the register stored by the store. The memory dependency predictor may also be used to detect loads that are dependent on a store but cannot be renamed. In such a configuration, the dependence is signaled to the load store unit and the load store unit uses the information to issue the load after the identified store has its physical address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.