Selective deposition of etch-stop layer for enhanced patterning

US11094542B2 · kind B2 · utility

Assignee

• Lam Research Corporation · US

Inventors

• Nagraj Shankar · Tualatin, US
• Kapu Sirish Reddy · Portland, US
• Jon Henri · West Linn, US
• Pengyi Zhang · Tigard, US
• Elham Mohimi · Hillsboro, US
• Bhavin Jariwala · Lake Oswego, US
• Arpan Mahorowala · West Linn, US

Key dates

• Filing date: Jan 15, 2020
• Grant date: Aug 17, 2021
• Expiry date: Feb 14, 2040

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/67069
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods, systems, and computer programs are presented for selective deposition of etch-stop layers for enhanced patterning during semiconductor manufacturing. One method includes an operation for adding a photo-resist material (M2) on top of a base material (M1) of a substrate, M2 defining a pattern for etching M1 in areas where M2 is not present above M1. The method further includes operations for conformally capping the substrate with an oxide material (M3) after adding M2, and for gap filling the substrate with filling material M4 after the conformally capping. Further, a stop-etch material (M5) is selectively grown on exposed surfaces of M3 and not on surfaces of M4 after the gap filling. Additionally, the method includes operations for removing M4 from the substrate after selectively growing M5, and for etching the substrate after removing M4 to transfer the pattern into M1. M5 adds etching protection to enable deeper etching into M1.