Methods used in forming a memory array comprising strings of memory cells

US11094627B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Vladimir Machkaoutsan · Leuven, BE
• Pieter Blomme · Heverlee, BE
• Emilio Camerlenghi · Bergamo, IT
• Justin B. Dorhout · Boise, US
• Jian Li · Boise, US
• Ryan Meyer · Boise, US
• Paolo Tessariol · Montebelluna, IT

Key dates

• Filing date: Oct 25, 2019
• Grant date: Aug 17, 2021
• Expiry date: Oct 25, 2039

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B43/35
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers. Operative channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. First dummy pillars in the memory blocks extend through at least a majority of the insulative tiers and the conductive tiers through which the channel-material strings extend. Second dummy pillars are laterally-between and longitudinally-spaced-along immediately-laterally-adjacent of the memory blocks. The second dummy pillars extend through at least a majority of the insulative tiers and the conductive tiers through which the operative channel-material strings extend laterally-between the immediately-laterally-adjacent memory blocks. Other embodiments, including method, are disclosed.