Method for fabrication of a semiconductor structure including an interposer free from any through via
US11114314B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2017 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Oct 16, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor structure includes introducing, at selected conditions, hydrogen and helium species (e.g., ions) in a temporary support to form a plane of weakness at a predetermined depth therein, and to define a superficial layer and a residual part of the temporary support; forming on the temporary support an interconnection layer; placing at least one semiconductor chip on the interconnection layer; assembling a stiffener on a back side of the at least one semiconductor chip; and providing thermal energy to the temporary support to detach the residual part and provide the semiconductor structure. The interconnection layer forms an interposer free from any through via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.