Source line voltage control for NAND memory
US11139022B1 · kind B1 · utility
2Cited by
0References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2020 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Jun 22, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example of an apparatus includes a plurality of memory cells arranged in a plurality of NAND strings that are connected to a source line and a control circuit connected to the source line. The control circuit is configured to provide a first current to the source line to pre-charge the source line to a target voltage for sensing data states of the plurality of memory cells and provide a second current to the source line to return the source line to the target voltage in a recovery period between sensing data states. The control circuit is configured to provide the second current at any one of a plurality of current levels.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.